Abstract
Computer-aided design (CAD) for very large scale integration (VLSI) involves
Keywords
clock network, scheduling, sparse graphs, timing, useful skew, VLSI
Degree Type
Dissertation
Degree Name
Doctor of Philosophy (PhD)
Department
Electrical and Computer Engineering
First Advisor
Cheng-Kok Koh
Committee Member 1
Anand Raghunathan
Committee Member 2
Ganesh Subbarayan
Committee Member 3
Dan Jiao
Date of Award
January 2016
Recommended Citation
Ewetz, Rickard Fredrik Waldemar, "Synthesis of Clock Trees with Useful Skew based on Sparse-Graph Algorithms" (2016). Open Access Dissertations. 1384.
https://docs.lib.purdue.edu/open_access_dissertations/1384
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