Inversion-type enhancement-mode InP MOSFETs with ALD, AI2O3, HfO2 and HfAIO nanolaminates as high-k gate dielectrics

Author

Y. Q. Wu, Birck Nanotechnology Center and Electrical and Computer Engineering, Purdue UniversityFollow
Y. Xuan, Birck Nanotechnology Center and School of Electrical and Computer Engineering, Purdue UniversityFollow
P. D. Ye, Birck Nanotechnology Center and School of Electrical and Computer Engineering, Purdue UniversityFollow

Abstract

As the Moore's Law push device scaling to a fundamental physical limit, alternatives have been attempted to explore tha "Plenty of Room at the Bottom." Chip giant Intel and IBM announced the high-k dielectric with metal gate technology on their 45-nm node generation using ALD— "The implementation of high-k and metal materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s" — by Gordon Moore

This somehow gives people the motivation to pursue the similar concept: ALD high-k dielectric on III-V compound semiconductor MOSFETs, which have higher mobility than Silicon, probably a suitable candidate of further generations.

Keywords

atomic layer deposition

Date of this Version

April 2007

Recommended Citation

Wu, Y. Q.; Xuan, Y.; and Ye, P. D., "Inversion-type enhancement-mode InP MOSFETs with ALD, AI2O3, HfO2 and HfAIO nanolaminates as high-k gate dielectrics" (2007). Birck Poster Sessions. Paper 10.
https://docs.lib.purdue.edu/nanoposter/10