Keywords
3D Microelectronics Packaging, Optimal Thermal Design, Finite Element Method, Sequential Quadratic Programming Algorithm
Presentation Type
Event
Research Abstract
Currently, three-dimensional electronic assemblies (3D Packages) are a key technology for enabling heterogeneous integration and “more than Moore” functionality. A critical bottleneck to the viability of 3D Packages is their thermal design. Traditionally, heat spreaders are used as a passive method to reduce the peak temperature as well as temperature gradient on the chip. However, heat spreaders by themselves are often insufficient in stacked, multiple-die containing 3D Packages. Towards this end, to more efficiently remove heat, silicon interposers with through silicon vias (TSV) are used. However, careful design of number and location of TSVs is necessary. In addition, the heat spreader design as well as the selection of thermal interface materials needs careful consideration. At the present time, there are no automated tools available to carryout such a thermal design of 3D Packages.
The present study is focused on the development of an efficient tool that determines the optimal configuration of heat spreading elements subject to constraints on allowable copper heat spreading area or metal volume. To achieve this goal, a three-dimensional finite element analysis (FEA) code for steady-state heat conduction is coupled with a sequential quadratic programming (SQP) algorithm, and both are implemented within the MATLAB environment. Considerable effort was spent to ensure efficient matrix solution using a sparse matrix solver during FEA. Several example problems are solved and the results are compared against solutions obtained using Simulia iSight in combination with the sophisticated Simulia ABAQUS FEA tool. The developed tool is demonstrated to be nearly two-orders of magnitude faster for the same level of accuracy in the final solution.
Session Track
Modeling and Simulation
Recommended Citation
Yifan Weng, Chun-Pei Chen, and Ganesh Subbarayan,
"Thermal Design of Three-Dimensional Electronic Assemblies"
(August 6, 2015).
The Summer Undergraduate Research Fellowship (SURF) Symposium.
Paper 33.
https://docs.lib.purdue.edu/surf/2015/presentations/33
Included in
Thermal Design of Three-Dimensional Electronic Assemblies
Currently, three-dimensional electronic assemblies (3D Packages) are a key technology for enabling heterogeneous integration and “more than Moore” functionality. A critical bottleneck to the viability of 3D Packages is their thermal design. Traditionally, heat spreaders are used as a passive method to reduce the peak temperature as well as temperature gradient on the chip. However, heat spreaders by themselves are often insufficient in stacked, multiple-die containing 3D Packages. Towards this end, to more efficiently remove heat, silicon interposers with through silicon vias (TSV) are used. However, careful design of number and location of TSVs is necessary. In addition, the heat spreader design as well as the selection of thermal interface materials needs careful consideration. At the present time, there are no automated tools available to carryout such a thermal design of 3D Packages.
The present study is focused on the development of an efficient tool that determines the optimal configuration of heat spreading elements subject to constraints on allowable copper heat spreading area or metal volume. To achieve this goal, a three-dimensional finite element analysis (FEA) code for steady-state heat conduction is coupled with a sequential quadratic programming (SQP) algorithm, and both are implemented within the MATLAB environment. Considerable effort was spent to ensure efficient matrix solution using a sparse matrix solver during FEA. Several example problems are solved and the results are compared against solutions obtained using Simulia iSight in combination with the sophisticated Simulia ABAQUS FEA tool. The developed tool is demonstrated to be nearly two-orders of magnitude faster for the same level of accuracy in the final solution.