Date of Award
January 2015
Degree Type
Thesis
Degree Name
Master of Science in Electrical and Computer Engineering (MSECE)
Department
Electrical and Computer Engineering
First Advisor
Kaushik Roy
Committee Member 1
Anand Raghunathan
Committee Member 2
Vijay Raghunathan
Abstract
Approximate Computing has emerged as a new low-power design approach for application domains characterized by intrinsic error resilience. Digital Signal Processing (DSP) is one such domain where outputs of acceptable quality can be produced even though the internal computations are carried out in an approximate manner. With the ever increasing need for data rates at lower power usage; the need for improved complexity reduction schemes for DSP systems continues. One of the most widely performed steps in DSP is FIR filtering. FIR filters are preferred due to their linear
Recommended Citation
Banerjee, Aparajita, "A FRAMEWORK FOR OPTIMAL DESIGN OF LOW-POWER FIR FILTERS" (2015). Open Access Theses. 1168.
https://docs.lib.purdue.edu/open_access_theses/1168