Mechanism of vertical Ge nanowire nucleation on Si (111) during subeutectic annealing and growth
Abstract
The direct integration of Ge nanowires with silicon is of interest in multiple applications. In this work, we describe the growth of high-quality, vertically oriented Ge nanowires on Si (111) substrates utilizing a completely sub-Au-Si-eutectic annealing and growth procedure. With all other conditions remaining identical, annealing below the Au-Si eutectic results in successful heteroepitaxial nucleation and growth of Ge nanowires on Si substrate while annealing above the Au-Si eutectic leads to randomly oriented growth. A model is presented to elucidate the effect of the annealing temperature, in which we hypothesized that sub-Au-Si-eutectic annealing leads to the formation of a single and well-oriented interface, essential to template heteroepitaxial nucleation. These results are critically dependent on substrate preparation and lead to the creation of integrated nanowire systems with a low thermal budget process.
Keywords
FIELD-EFFECT TRANSISTORS; SILICON NANOWIRES; TEMPERATURE; INTEGRATION; DEVICES
DOI
10.1557/jmr.2011.313
Citation
Journal of Materials Research: Volume 26, Issue 21. November 2011, pp. 2744-2748
Date of this Version
11-2011
Recommended Citation
Park, Se Jun; Chung, Sung Hwan; Kim, Bong-Joong; Qi, Minghao; Xu, Xianfan; Stach, Eric A.; and Yang, Chen, "Mechanism of vertical Ge nanowire nucleation on Si (111) during subeutectic annealing and growth" (2011). Birck and NCN Publications. Paper 937.
http://dx.doi.org/10.1557/jmr.2011.313