Full Three-Dimensional Quantum Transport Simulation of Atomistic Interface Roughness in Silicon Nanowire FETs
Abstract
The influence of interface roughness scattering (IRS) on the performances of silicon nanowire (NW) field-effect transis- tors is numerically investigated using a full 3-D quantum transport simulator based on an atomistic sp3 d5 s∗ tight-binding model. An interface between silicon and silicon dioxide layers is gener- ated in a real-space atomistic representation using an experimen- tally derived autocovariance function. An oxide layer is modeled in a virtual crystal approximation using fictitious SiO2 atoms. ⟨110⟩-oriented NWs with different diameters and randomly gen- erated surface configurations are studied. An experimentally observed ON-current and threshold voltage are quantitatively cap- tured by the simulation model. The mobility reduction due to IRS is studied through a qualitative comparison of the simulation results with the experimental data.
Keywords
Atomistic, full-band simulations, interface roughness scattering (IRS), Si gate-all-around (GAA) nanowire (NW) transistors.
DOI
10.1109/TED.2011.2118213
Citation
IEEE Transactions on Electron Devices (May 2011) Vol 58 Issue 5, pp. 1371-1380
Date of this Version
5-2011
Recommended Citation
Kim, SungGeun; Luisier, Mathieu; Paul, Abhijeet; Boykin, Timothy B.; and Klimeck, Gerhard, "Full Three-Dimensional Quantum Transport Simulation of Atomistic Interface Roughness in Silicon Nanowire FETs" (2011). Birck and NCN Publications. Paper 805.
http://dx.doi.org/10.1109/TED.2011.2118213