High-voltage self-aligned p-channel DMOS-IGBTs in 4H-SiC
Date of this Version
8-1-2007This document has been peer-reviewed.
Abstract
SiC power MOSFETs designed for blocking voltages of 10 kV and higher face the problem of high drift layer resistance that gives rise to a high internal power dissipation in the ON-state. For this reason, the ON-state current density must be severely restricted to keep the power dissipation below the package limit. We have designed, optimized, and fabricated high-voltage SiC p-channel doubly-implanted metal-oxide-semiconductor insulated gate bipolar transistors (IGBTs) on 20-kV blocking layers for use as the next generation of power switches. These IGBTs exhibit significant conductivity modulation in the drift layer, which reduces the ON-state resistance. Assuming a 300 W/cm(2) power package limit, the maximum currents of the experimental IGBTs are 1.2 x and 2.1 x higher than the theoretical maximum current of a 20-kV MOSFET at room temperature and 177 degrees C, respectively.
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