Simulation Study of Thin-Body Ballistic n-MOSFETs Involving Transport in Mixed Gamma-L Valleys

Saumitra R. Mehrotra, Birck Nanotechnology Center, Purdue University
Michael Povolotskyi, Birck Nanotechnology Center, Purdue University
Doron Cohen Elias, University of California - Santa Barbara
Tillmann Kubis, Birck Nanotechnology Center, Purdue University
Jeremy J. M. Law, University of California - Santa Barbara
Mark J. W. Rodwell, University of California - Santa Barbara
Gerhard Klimeck, Network for Computational Nanotechnology, Birck Nanotechnology Center, Purdue University

Abstract

Transistor designs based on using mixed Gamma-L valleys for electron transport are proposed to overcome the density of states bottleneck while maintaining high injection velocities. Using a self-consistent top-of-the-barrier transport model, improved current density over Si is demonstrated in GaAs/AlAsSb, GaSb/AlAsSb, and Ge-on-insulator-based single-gate thin-body n-channel metal-oxide-semiconductor field-effect transistors. All the proposed designs successively begin to outperform strained-Si-on-insulator and InAs-on-insulator (InAs-OI) in terms of ON-state currents as the effective oxide thickness is reduced below 0.7 nm. InAs-OI still exhibits the lowest intrinsic delay (tau) due to its single Gamma valley.

Discipline(s)

Nanoscience and Nanotechnology