"A high-efficiency low-cost wire-bond loop antenna for CMOS wafers" by Kim Dowon, R. Willmot et al.
 

Abstract

The performance of a vertical-type loop antenna made by two asymmetrical wire bonds on a low-resistivity silicon substrate was investigated. The large-loop height was increased from 0 to 0.3 o, and the peak gain and radiation efficiency were observed after numerically removing the feed-line loss of 4 dB/mm at 50 GHz. When the loop height was increased from 0 to 0.2 o, the radiation efficiency showed a big improvement from 5.3 % to 40.2 % on a silicon substrate of ~8 .cm resistivity. Wire bonding is not only a cost-effective but also repeatable process, and this antenna can be easily connected to the front-end circuit with a differential-feed network. Therefore, the proposed vertical-type wire-bond antenna is a promising technique for high-efficiency on-chip radio antennas.

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Keywords

antenna radiation patterns, CMOS integrated circuits, loop antennas

Date of this Version

January 2009

DOI

http://dx.doi.org/10.1109/APS.2009.5172016

Published in:

2009 IEEE International Symposium on Antennas Propagation USNC/URSI National Radio Science Meeting (2009) 4 pp.-4 pp.;

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