Simulation of spin field effect transistors: Effects of tunneling and spin relaxation on performance
Abstract
numerical simulation of spin-dependent quantum transport for a spin field effect transistor is implemented in a widely used simulator, nanoMOS. This method includes the effect of both spin scattering in the channel and the tunneling barrier between the source/drain and the channel. Accounting for these factors permits setting more realistic performance limits for the transistor, especially the magnetoresistance, which is found to be lower compared to earlier predictions. The interplay between tunneling and spin scattering is elucidated by numerical simulation. Insertion of the tunneling barrier leads to an increased magnetoresistance. Simulations are used to explore the tunneling barrier design issues.
Date of this Version
2010
DOI
10.1063/1.3496666
Published in:
J. Appl. Phys. 108, 083702 (2010)
Comments
Copyright (2010) American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Institute of Physics. The following article appeared in J. of Appl. Phys, Vol. 108, no. 10, p. 083702-1 - 083702-10, Oct. 2010. and may be found at http://dx.doi.org/10.1063/1.3496666. The following article has been submitted to/accepted by Journal of Applied Physics. Copyright (2010) Yunfei Gao, Tony Low, Mark S. Lundstrom and Dmitri E. Nikonov. This article is distributed under a Creative Commons Attribution 3.0 Unported License.