Silicon nitride deposition, chromium corrosion mechanisms and source/drain parasitic resistance in amorphous silicon thin film transistors
Abstract
Hydrogenated amorphous silicon (a-Si:H) based thin film transistors (TFTs) are finding increased application as switching elements in active-matrix liquid crystal displays (AMLCDs). Extensive research has been focussed on optimizing fabrication conditions to improve materials quality and on reducing channel length to increase device speed. However, the basic physics and chemistry have not yet been fully understood. In addition, little attention has been paid to the significant effect of source/drain parasitics. The work described in this thesis is closely related to the speed and stability issues on the discrete device level. Specifically, the influence of gate nitride deposition and its NH$\sb3$ plasma treatment has been studied. The competing effects of nitridation reaction and radiation damage were found to cause an interesting trade-off between the device stability and speed. Further effort was devoted to the analysis of an important TFT failure phenomenon. Both electrical and spectroscopic techniques were utilized for gate Cr corrosion studies. It was determined that the corrosion was largely promoted by the CF$\sb4$ plasma exposure of Cr during the fabrication. Finally, new test structures were designed, fabricated and characterized to study the source/drain parasitic resistance.
Degree
Ph.D.
Advisors
Neudeck, Purdue University.
Subject Area
Electrical engineering
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