A system for algorithm-architecture mapping based on dependence graph matching
Abstract
In this thesis we describe a system for performing algorithm-to-architecture mapping for parallel processing algorithms. The algorithm-to-architecture mapping system is based on graph matching of dependency graphs, in order to recognize the data dependency structure of a new algorithm as an instance of a dependency structure for which an algorithm-to-architecture mapping is already known. This system is targeted at signal and image processing applications, where many algorithms have regular data dependency patterns and where several algorithms may exhibit the same data dependency structure. We first present a Candidate Elimination approach that reduces the number of graphs against which the input graph will be tested. We then present an approach using hypergraphs to simplify the isomorphism testing between two dependency graphs. We also present the rationale and overview of the hypergraph-based system, examples of the complexity reduction achievable with hypergraphs, and a description of the creation process, complexity, and characteristics of hypergraphs.
Degree
Ph.D.
Advisors
Jamieson, Purdue University.
Subject Area
Electrical engineering|Engineering
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