Measurements of carrier generation-recombination parameters in silicon solar cell material using MOS techniques

Wai-Ming Au, Purdue University

Abstract

Modified and new measurement techniques were developed for determining the carrier generation-recombination (G-R) parameters in silicon solar cell material under carrier deficit and low-level carrier excess conditions using MOS-based test structures. The structures mainly consisted of ring-dot MOS-Capacitors (MOS-C) and Schottky-Drained Gate-Controlled Diodes (SGCD). Sample G-R parameters were extracted from n-type high quality silicon solar cell material. Additional measurements were also performed on low-quality n-type silicon substrates for comparison purposes. The photoaccelerated MOS-C Capacitance-time (C-t) transient measurement technique, modified from the standard C-t method, allows one to drastically reduce the observation time in deducing the carrier generation lifetime ($\tau$$\sb{\rm g}$) by simply illuminating the test structure during the transient. In applying the technique to MOS-C's (which exhibited generation lifetime on the order of 1 msec) the observation time was reduced by approximately an order of magnitude. This is important in dealing with solar cell material because of typically long generation lifetimes. The SGCD structure, which consisted of an extended Schottky diode located next to an MOS-C, was developed and utilized for extracting the surface generation velocity (s$\sb{\rm g}$). The measurement is based on recording two C-t transients at V$\sb{\rm D}$ = 0 and at V$\sb{\rm D}$ = V$\sb{\rm T}$, respectively. The structure has a distinct advantage over the conventional PN junction GCD in that it is only slightly more complicated to fabricate and interrogate than a simple MOS-C. It was also demonstrated that steady-state deep-depletion C-V characteristics can be obtained using the SGCD structure. An MOS-C photo/forward-sweep measurement technique was primarily developed to extract the recombination lifetime ($\tau$$\sb{\rm p}$ for n-type substrates) under low-level carrier excess conditions. The new technique is based on the change in inversion capacitance in response to a set of illumination and forward-sweep voltages applied to the MOS-C. The technique conveniently allows one to extract the recombination lifetime under room temperature conditions and was successful applied to MOS-C's fabricated on high quality silicon solar cell substrates.

Degree

Ph.D.

Advisors

Pierret, Purdue University.

Subject Area

Electrical engineering

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