The PASM parallel processing system: Hardware design and operating system concepts

Thomas Schwederski, Purdue University

Abstract

Many of today's scientific and industrial problems require enormous computing power. Since circuit switching speeds are reaching fundamental limits, avenues to speed up computations other than that using faster components are being explored. One such avenue is the use of parallelism. PASM is a dynamically reconfigurable SIMD/MIMD parallel processing system design for up to 1,024 processing elements (PEs). It can be dynamically reconfigured to work as one or more SIMD (single instruction stream - multiple data stream) and/or MIMD (multiple instruction stream - multiple data stream) machines. A prototype with 30 MC68000 microprocessors, including 16 PEs in the computational engine, has been designed and constructed. The design of the prototype hardware is described, as well as the design tradeoffs that were made. Extending the current prototype by the addition of a Network Interface Unit (NIU) to each PE is proposed. Such an NIU significantly enhances interprocessor communication by offloading communication overhead from the PE's main CPU. One way to extend the prototype design to a system with 1,024 processors in the computational engine is presented. The powerful reconfiguration capabilities of PASM can be fully utilized only if all tradeoffs influencing reconfiguration are known. Attributes of the PASM architecture, operating system software, and potential application programs that affect both the cost and advantages of system reconfiguration are investigated. This information can be incorporated in a knowledge base for an Intelligent Operating System that automatically configures and reconfigures the PASM system to achieve optimum performance. One aspect of reconfiguration, task migration, is examined for systems that use a multistage cube network.

Degree

Ph.D.

Advisors

Siegel, Purdue University.

Subject Area

Electrical engineering

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