Space-time domain expansion approach to VLSI and its application to pattern recognition and image-processing

Heng-Da Cheng, Purdue University

Abstract

How to design VLSI architectures systematically and how to partition an algorithm for solving it on fixed size VLSI architectures are very important issues in VLSI design. By using proposed approach--space-time domain expansion and the computational model, we can solve both above problems easily. Many examples, such as VLSI implementations of vector inner-product, matrix-vector multiplication, matrix multiplication, convolution, comparison in relational database, Fast Fourier Transformation (FFT), and pattern recognition and image processing algorithms are discussed. This approach can be applied at different levels. This approach has no restriction on the dimensionality of the processing arrays. It can handle multi-directional dataflow and control-flow cases, so can design new architectures. One difficulty in making pattern recognition and image processing systems practically feasible, and hence more popularly used, is the requirement of computer time and storage. For solving this problem, VLSI implementation of PRIP algorithms is very attractive, because of the recursive nature of many PRIP algorithms and high speed, high reliability and low (even no) local memory requirement of VLSI architectures. VLSI implementations of hierarchical scene matching, string-matching, dynamic time-warp pattern-matching and hand-written symbol recognition are proposed. By using extensive pipelining and parallel techniques, the computation can be speeded up greatly. They will find many applications in the areas of pattern recognition, image processing and artificial intelligence, particularly, speech processing, office automation and signature recognition. This will promote the real-time Knowledge processing. The verifications of proposed architectures are also given.

Degree

Ph.D.

Advisors

Fu, Purdue University.

Subject Area

Electrical engineering

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