MEMORY ORGANIZATION AND SYNCHRONIZATION MECHANISM OF MULTIPROCESSING COMPUTER SYSTEMS
Abstract
The major threat to the performance of multiprocessor computers is attributed to the contention in the memory. Corporation of some local-form memory (local memory or cache memory) with an interleaved main memory is capable of reducing this interference. However, how to construct these local-memory or cache-memory based multiprocessor computers in a cost-effective manner is not clear, in fact, it is often even confused due to the effect of memory interference. In this research, a series of queueing network models which quantitatively relate the computer performance as measured by the effective instruction execution rate to the characterizations of its major components is proposed to examine and justify crucial architectural decisions. The parameters involved in these decisions are the number of processors and main memory modules, memory cycle time, processor processing speed, switching delay, hit ratio, main memory update policy, buffering, and the ratio of cache block size/data bus width. A new queueing device has also been introduced to handle the data transfer activities which are overlapped with the processor's execution but have the direct effect on the main memory response time. In multicache systems, multiple copies of a given main memory block may exist in several private caches. This causes the vital problem of data coherence. A systematic way to solve the coherence problems has been illustrated. The proposed LSCS (Logical Semi-Critical Section) scheme inherits the dynamically managed central map from previous solution, however, it reduces the effective memory access time by making as many local responses as possible. Reliable synchronization in the sense that a system will continue to operate correctly in spite of a failure of any individual component has also been considered for multiprocessor computers. The key to achieve the reliability is logical distribution. A set of logically distributed synchronization mechanisms with constant space-complexity is proposed.
Degree
Ph.D.
Subject Area
Electrical engineering
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