The design and development of low-power seizure detection hardware on integrated neural recording platforms for closed-loop epilepsy prostheses

Shriram Raghunathan, Purdue University

Abstract

One percent of the world's population, including over 3 million Americans, suffers from epilepsy. Electrical neurostimulation is an alternative therapy for the 30-40% of this patient population that does not respond to pharmacological treatment. Efficient seizure detection algorithms enable stimulation of the epileptogenic focus within an early onset window, suppressing the spread of electrical synchronization in the brain, and stopping seizures in their tracks. Critically, this reduces neuronal desensitization to currently approved deep-brain stimulators, which stimulate at fixed intervals irrespective of seizure activity. Additionally, the integration of signal processing algorithms within the implantable device eliminates the need to transmit data wirelessly to an external device for seizure detection. This significantly reduces the power consumption of the implant, its required battery capacity, size, and therefore, the invasiveness of the surgical procedure. This dissertation presents a 250-nW ultra-low power algorithm that detects seizures with a sensitivity and selectivity of 95.3% and 88.9%. The algorithm is implemented on a microchip less than 0.25mm2 in size and operating with supply voltages as low as 300-mV. A set of hardware optimization techniques are presented that enable translating algorithms from mathematical models to practical tools in implantable neural prosthetics. The utility of the proposed design methodology is demonstrated by constructing hardware-optimized detection algorithms using a combination of mathematical features extracted from live-animal data, used to model human temporal lobe epilepsy. A further application of this technique is explored in enhancing the efficacy of other detection algorithms at an incremental hardware cost, when used in combination. Prototype results from a fully-implantable neural recording system with a magnetically insertable electrode interface are presented. These demonstrate the broad applicability of real-time, low power, feature extraction algorithms. This novel platform combines a new microelectrode and a microchip with amplification and signal processing hardware in an integrated miniaturized package. The low power and miniaturization made possible by this approach has applications ranging from brainmachine interfaces to neural prostheses for hearing, sight, Parkinsons, as well as our own work in epilepsy.

Degree

Ph.D.

Advisors

Irazoqui, Purdue University.

Subject Area

Biomedical engineering|Electrical engineering

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