Electrical Characterization of Emerging Devices for Low and High-Power Applications

Sami Alghamdi, Purdue University

Abstract

Si-based technologies and semiconductor industries are reaching an inevitable scaling and power dissipation constrains. On top to that, fast growing demands for applications such as Internet of things (IoT) is calling for low power and low cost devices, while other applications as for RF, 5G, and Electrical Automotive applications is calling for extremely power efficient, high quality, and high speed devices. Researchers over the recent years have been exploring an alternative channels in order to help Moors law survive. Areas of research involve: competitive materials, such as highmobility III-V semiconductors, 2-dimensional (2D) materials, and Germanium (Ge), in addition to a novel device structures, as metal-oxide-semiconductor (MOS) highelectron-mobility transistors (HEMT) (or MOS-HEMT), fin field-effect transistors (FinFETs), negative capacitance field-effect transistors (NC-FETs), and ferroelectric field-effect transistors (FeFETs). However, as important as realizing these alternatives, it is equally important to accurately characterize electrical performances, reliability, and variability of these state-of-the-art ultra-scaled devices. In this thesis, an interface passivation by a lattice matched atomic layer deposition (ALD) epitaxial magnesium calcium oxide (MgCaO) on wide-bandgap gallium nitride (GaN) has been applied for the first time and expensively studied via various characterization methods (including AC conductance methods, pulsed current-voltage, and single pulse charge pumping). Also, β-Ga2O3 with a monoclinic crystal structure that offers several surface oriented channels has been demonstrated as potential β-Ga2O3FET. Among those surfaces, commercially available (-201) and (010), in which have been studied and compared from the interface quality point of view through another set of electrical characterization methods (such as frequency dependent, photo-assisted capacitancevoltage (C-V), and ultraviolet light-Based currentvoltage measurements). This thesis also provides guidance for future high speed, high power devices development. On the other hand, low frequency noise studies in 2-D MoS2 NC-FETs was reported for the first time. Low frequency noise of the devices is systematically studied depending on various interfacial oxides, different thicknesses of interfacial oxide, and ferroelectric hafnium zirconium oxide (Hf0.5Zr0.5O or HZO). Interestingly enough, the low frequency noise is found to decrease with thicker ferroelectric HZO in the subthreshold regime of the MoS2 NC-FETs, in stark contrast to the conventional high-k transistors. This result can be interpreted as electrostatic improvement induced by the negative capacitance effect. And to gain further insights about ferroelectric dielectric, time response of polarization reversal in Germanium nanowire (NW) Fe-FETs with HZO as ferroelectric insulator have been analyzed by fast dual gate voltage sweep, where it is found that the time response of polarization reversal leads to a voltage hysteresis and maximum drain current time-dependency in Ge NW Fe-FETs. Also, the ferroelectric switching speed is found to be related with the maximum electric field applied during the fast gate voltage sweep, suggesting the internal ferroelectric switching speed can be even faster depending on the devices electrical bias conditions and promises a high speed performance in our ferroelectric HZO. In addition, reliability issues related to ferroelectric HZO when accompanied by another layer of conventional high-k oxide, including switching mechanism and endurance performance, were primarily studied and revealed a significant degradation in the polarization retention, which is an essential part in the longevity of access memory devices made of ferroelectric HZO.

Degree

Ph.D.

Advisors

Ye, Purdue University.

Subject Area

Nanotechnology

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