Efficient Implementation Of Sobel Edge Detection With ZYNQ-7000
Abstract
Edge detection is one of the most important application in image processing. Field-Programmable Gate Arrays (FPGAs) have become popular computing platforms for signal and image processing. The Zynq-7000 System on Chip (SOC) is a dual-processor platform with shared memory. The thesis describes a novel and fast implementation of Sobel edge detection using the Zynq-7000 SoC. Our implementation is a combination of software and hardware using the Vivado HLS and Zynq (SoC). As a result our implementation is fast. We make a comparison with other conventional edge detection techniques and show that the speed of operation of this design is much faster.
Degree
M.Sc.
Advisors
Cooklev, Purdue University.
Subject Area
Computer science
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