A framework for optimal design of low-power FIR filters

Aparajita Banerjee, Purdue University

Abstract

Approximate Computing has emerged as a new low-power design approach for application domains characterized by intrinsic error resilience. Digital Signal Processing (DSP) is one such domain where outputs of acceptable quality can be produced even though the internal computations are carried out in an approximate manner. With the ever increasing need for data rates at lower power usage; the need for improved complexity reduction schemes for DSP systems continues. One of the most widely performed steps in DSP is FIR filtering. FIR filters are preferred due to their linear phase, stability and ease of implementation. In order to build low-power DSP systems; there have been many efforts to reduce the implementation cost of FIR filters with little loss of quality. However most of the implementations fail to guarantee an optimum solution. In this thesis, we developed a new mathematical framework for designing FIR Filter with reduced complexity so as to improve performance at reduced power. Given some approximate circuits, the idea is to make the design process aware of them. The proposed methodology is formulated as a linear programming problem that minimizes the Chebyshev error. The impact of hardware approximations is quantified as a function of filter coefficients and converted into the frequency domain. This error can be potentially recovered by intelligently designing a framework that solves the filter design problem with “error due to complexity reduction” as an additional constraint. The design methodology generates a set of filter coefficients that satisfies the filter specifications and adheres to a low-power implementation. By doing this in a systematic and guided manner, we can achieve energy efficiency at acceptable quality.

Degree

M.S.E.C.E.

Advisors

Roy, Purdue University.

Subject Area

Electrical engineering

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