Interface characterizations of atomic-layer-deposited high-k dielectrics on narrow bandgap semiconductors
Abstract
In order to further scale down Si CMOS technology beyond 10 nm node, alternative high-mobility channel materials are needed. The low-field high electron mobility for narrow bandgap III-V semiconductors such as InAs and InSb and high hole mobility for Ge and GaSb make them possible to operate at low drain and gate bias voltages thus with low power dissipation. To enable high-mobility channel materials for logic applications, the oxide/semiconductor interface quality is essential. In this thesis, I mainly focus on the interface studies of atomic-layer-deposited (ALD) Al2O3 as gate dielectric on narrow bandgap materials such as InSb and InAs, for n-channels and GaSb and Ge for p-channels. By using multi-frequency capacitance-voltage (C-V) and conductance-voltage (G-V) approaches, we can determine the Dit (Interface Trap Density) vs energy level within the semiconductor bandgap. The interface study includes both (100) and (111) orientations since the atomic structure on different crystal orientations plays a very important role in terms of the interface quality. We apply the Trap Neutral Level (TNL) concept at the "defective" oxide/semiconductor interfaces to explain the experimental results, in particular, at InAs MOS interface. In addition to the interface study, we also investigate to apply complex oxides or higher-κ dielectrics on III-V or Ge in order to reduce the equivalent-oxide-thickness (EOT) down to 1-2 nm as required by International Semiconductor Technology Roadmap[1]. We discover ALD complex oxides (such as LaxY1-xO3 with κ∼20) can be epitaxial grown on Ge(111) and other (111) oriented semiconductor surfaces. Detailed interface characterizations of LaxY1-xO 3 on Ge (111) and Ge (100) are presented in this thesis.
Degree
M.S.E.C.E.
Advisors
YE, Purdue University.
Subject Area
Electrical engineering|Nanotechnology
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