Tunneling Transistors from 2D Crystals for Low-Power Electronic Applications

Abhijith Prakash, Purdue University

Abstract

In the past, failure to handle heat dissipation in the integrated circuits (ICs) employing bipolar transistor technologies had forced the semiconductor industry to resort to complementary metal oxide semiconductor (CMOS) technology. Over the last decade, challenges in scaling down the supply voltage (VDD), which should have kept pace with the scaling of transistor dimensions, have led to excessive power dissipation in the state-of-art CMOS transistors. This has again resulted in increased heating of the ICs, which calls for a new device concept/technology to solve the problem. Hampered VDD scaling is mainly due to the design of current day transistors, which poses a fundamental limitation on the inverse sub-threshold slope (SS) i.e., 60mV/dec at room temperature. To overcome this, new device designs have been proposed and are being pursued to be implemented in the future electronic devices. This dissertation presents the investigations conducted towards realizing one such promising device idea—tunneling field-effect transistors (TFETs)—from 2D crystals, which exhibit innate electrostatic integrity and hence are excellent choices for channel material which can undergo aggressive length-scaling. As a part of this research, band-to-band tunneling has been experimentally demonstrated in WSe2 tunneling transistors. While working towards improving the electrical characteristics of these transistors, electronic bandgap of WSe2 as a function of its thickness has been determined experimentally for the first time, and several critical insights are gained about the transport in Schottky barrier field-effect transistors (SB-FETs) with various contact and gating schemes. These insights are gained through detailed experimentation combined with simple numerical calculations and modeling to understand the experimental results. Especially, investigation of the impact of device architecture on electrical characteristics of SB-FETs from 2D channels is one of the major advancements in the field of Schottky barrier transistors. Finally, substantial improvement in the performance of WSe2 tunneling transistors is achieved by making use of all the above findings, and a plan to further improve these tunneling transistors is proposed.

Degree

Ph.D.

Advisors

Appenzeller, Purdue University.

Subject Area

Electrical engineering

COinS