III-V MOSFETs with atomic-layer-epitaxial dielectric: Device and reliability

Jingyun Zhang, Purdue University

Abstract

High mobility III-V materials have long been considered to replace Silicon in future CMOS logic circuits. In particular, GaAs and InGaAs are the most promising candidates for nMOSFETs. However, one of the bottlenecks of III-V MOSFETs is the interface quality. In this thesis, III-V MOSFETs with epitaxial dielectric are explored both on device fabrication and reliability. In particular, La2O3 epitaxial dielectric was successfully deposited on GaAs(100) substrate through the anisotropic wet etching process to form wave structures and (111)A surface on GaAs(100) substrate. This solves the problem that La based oxide can not only be epitaxially grown on GaAs(111) substrate but also GaAs(100) substrate. GaAs(100) substrate is technically more important than GaAs(111) substrate. However, reliability performance is important for massive production. Therefore, PBTI and HCI are systematically studied on GaAs nMOSFETs with epitaxial La2O3 as gate dielectric. The interface quality of epitaxial La-based oxides on Ge(111) has also been studied for with MOSCAP and MOSFET structures. A novel wet etching process is developed on InGaAs. InGaAs GAA nanowire MOSFETs, vertical FinFETs and WaveFETs have been obtained by simple wet etching on bulk InGaAs without any selective etching buffer layer. Potential application of ALE gate dielectrics on InGaAs GAA nanowires MOSFETs and WaveFETs could be realized and the InGaAs/oxide interface quality could be further improved.

Degree

Ph.D.

Advisors

Ye, Purdue University.

Subject Area

Chemical engineering|Electrical engineering

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