Date of Award
Spring 2014
Degree Type
Thesis
Degree Name
Master of Science (MS)
Department
Electrical and Computer Engineering
First Advisor
Saeed Mohammadi
Committee Member 1
Afshin Izadian
Committee Member 2
Byunghoo Jung
Committee Member 3
Dimitrios Peroulis
Abstract
With the recent advancements in semiconductor manufacturing towards smaller, faster and more efficient microelectronic systems, the problems of increasing leakage current and reduced breakdown voltage in bulk-CMOS transistors have become substantial in the sub-100-nanometer era. The Peregrine UltraCMOS Silicon-on-Sapphire (SOS) technology that uses highly-insulating sapphire substrate as insulator was introduced to meet the continually growing need for higher performance RF products. The electrically isolated circuit elements in the UltraCMOS technology lead to increased switching speeds and lower power consumption due to reduced junction and parasitic capacitances. Furthermore, the growing need for high-speed switching applications such as boosting a lower voltage level to a higher one gives the UltraCMOS technology an upper hand over the bulk-CMOS process.
The limitation to using an UltraCMOS transistor is that its maximum drain to source voltage (VDS ) swing is 2.5V. This thesis aims to address this limitation by studying and implementing various stacking techniques in high power switching applications where voltage switching of higher than 2.5V are required. Fully-integrated DC to DC boost converters with switching circuits based on dynamically self-biased stacked transistors are proposed. For high voltage and high power handling, the proposed stacking techniques equally distribute the overall output voltage to less than 2.5V across each stacked transistor in the switch (V DS of 2.5V).
Recommended Citation
Mohammad, Imaduddin, "Integrated DC-DC boost converters using CMOS silicon on Sapphire Technology" (2014). Open Access Theses. 456.
https://docs.lib.purdue.edu/open_access_theses/456