Date of Award

12-2017

Degree Type

Dissertation

Degree Name

Doctor of Philosophy (PhD)

Department

Electrical and Computer Engineering

Committee Chair

Gerhard Klimeck

Committee Member 1

Mark JW Rodwell

Committee Member 2

Michael Povolotskyi

Committee Member 3

Zhihong Chen

Committee Member 4

Peide Ye

Abstract

Future Very-large-scale-integrated (VLSI) circuits require low supply voltage for minimizing the energy consumption, yet reducing supply voltage for MOSFETs typically increases OFF-current (IOFF ). Steep Subthreshold Swing (S.S.) devices can operate under low voltage without increasing IOFF . Ideal, completely coherent quantum transport calculations had predicted that superlattice MOSFETs (SL-MOSFET) may offer steep subthreshold swing performance below 60mV/dec to around 39mV/dec. However, the high carrier density in the superlattice source suggests that scattering may significantly degrade the ideal device performance. Such effects of electron scattering and decoherence in the contacts of SL-MOSFETs will be examined through a multi-scale quantum transport model developed in NEMO5. Finally, different SL-MOSFET designs are explored to mitigate the effects of such deleterious scattering Tunnel FET (TFET) can also obtain steep S.S. However, their ION is limited by tunneling probability. We will enhance the transmission using (110) confinement and additional heterojunctions (HJ) in the channel and source. They reduce tunnel barrier and create two resonant states, forming a triple HJ TFET. The effects of phonon scattering on IOFF will also be discussed. In addition, if there is a trap state in the middle of the bandgap, electrons could tunnel through the trap inelastically, also increasing IOFF . We will use a phenomenological scattering model in NEMO5 to explore the effects of trap location and energy on IOFF of tunnel FETs. The effects of wave function penetration on IOFF will also be discussed.

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