Date of Award

January 2014

Degree Type

Dissertation

Degree Name

Doctor of Philosophy (PhD)

Department

Electrical and Computer Engineering

First Advisor

Gerhard Klimeck

Committee Member 1

Gerhard Klimeck

Committee Member 2

Kwok Ng

Committee Member 3

Peide Ye

Committee Member 4

Mark Lundstrom

Abstract

Channel length of metal oxide semiconductor field effect transistors (MOSFETs) are scaling below 20 nm. At this scale, quantum mechanical effects, including source to drain tunneling and quantum confinement play an increasingly important role in predicting device performance. Accurate projections of device characteristics are of high interest in the semiconductor industry. This work presents a semi-empirical model based quantum transport tool, which is used for accurately predicting the performance of double gate MOSFETs over the next 15 years as part of the International Technology Roadmap for Semiconductors (ITRS). The results show ON-current and performance degradation as a result of source to drain (SD) tunneling, and band structure alteration and supply voltage reduction due to scaling. Furthermore, the impacts of SD tunneling in ultra-scaled devices are investigated. In particular, heavy mass materials and the lightly doped drain are proposed as solutions for SD tunneling. Thick gate stacks can degrade electrostatics in ultra-scaled MOSFETs. Here, we present an approach to find optimum oxide thicknesses in order to prevent gate leakage and optimize device electrostatics.

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