Loss Optimization of Coplanar Strips for CMOS RFICs

Muhammad S. Arif, Purdue University - Main Campus
Dimitrios Peroulis, Birck Nanotechnology Center and School of Electrical and Computer Engineering, Purdue University

Date of this Version


This document has been peer-reviewed.



An optimization scheme for minimizing substrate losses in coplanar strips (CPS) transmission line on CMOS grade low resistivity silicon substrate with SU-8 polymer as dielectric interface layer, is presented. It is shown that through careful selection of CPS linewidth, the substrate losses can be sufficiently reduced for a given dielectric layer thickness. For a 100 Omega CPS line with SU-8 polymer as dielectric, the optimized linewidth has been found to be around three times the SU-8 layer thickness. Utilizing this approach, CPS lines with attenuation as low as 0.9 dB/mm at 40GHz has been demonstrated on a 15-mu m thick SU-8 layer, which is comparable to the coplanar waveguide (CPW) line losses on similar dielectric thickness as reported in literature. A compact, wideband, and low loss CPW/CPS RF transition has also been presented with the measured RF back-to-back transition loss of less than 0.85 dB till 40 GHz.


Engineering | Nanoscience and Nanotechnology