Generating integrated-circuit patterns via cutting and stitching of gratings

Lin Zhao, Purdue University - Main Campus
Yi Xuan, Purdue University - Main Campus
Minghao Qi, Birck Nanotechnology Center, Purdue University

Date of this Version



J. Vac. Sci. Technol. B 27„6..., Nov/Dec 2009

This document has been peer-reviewed.



Integrated-circuit patterns, such as those of transistor gates, usually consist of multivertex paths whose line segments are along two orthogonal directions. Such patterns are sometimes called "Manhattan structures" and are typically designed to achieve the highest packing density with a given linewidth. Owing to their arbitrary shapes, these patterns are predominantly generated via electron-beam lithography, a serial process which is inherently slow compared to parallel processes. Moreover, throughput is further reduced with the necessity of proximity correction in electron-beam lithography. On the other hand, interference lithography is a low-cost, parallel process that can achieve small linewidths and pitches, yet the achievable patterns are limited to gratings or other periodic structures. Here the authors propose to synthesize arbitrary Manhattan structures from regular structures such as gratings via cutting and stitching. They demonstrate the cutting and stitching of large-area, highly smooth gratings formed by interference lithography and orientation-dependent etch of silicon. Our method could significantly reduce the writing time in electron-beam lithography for pattern generation and requires no proximity correction.


Nanoscience and Nanotechnology