Performance Analysis of a Ge/Si Core/Shell Nanowire Field-Effect Transistor

Gengchiau Liang, Harvard University
Jie Xiang, Harvard University
Neerav Kharche, Purdue University - Main Campus
Gerhard Klimeck, Purdue University - Main Campus
Charles M. Lieber, Harvard University
Mark Lundstrom, Purdue University - Main Campus

Date of this Version



The work at Purdue was supported by the MARCO Focus Center on Materials, Structures, and Devices, the Army Research Office, the Semiconductor Research Corporation (SRC), the National Science Foundation under grant EEEC-0228930, and Purdue University. Work at Harvard was supported by Defense Advanced Research Projects Agency and Intel. We thank Raseong Kim, Kurtis Cantley, Sayeef Salahuddin, and Diego Kienle for helpful discussions. Computational support was provided by the Network for Computational Nanotechnology.


We ana/lyze the performance of a recently reported Ge/Si core/shell nanowire transistor using a semiclassical, ballistic transport model and an sp3d5s* tight-binding treatment of the electronic structure. Comparison of the measured performance of the device with the effects of series resistance removed to the simulated result assuming ballistic transport shows that the experimental device operates between 60 and 85% of the ballistic limit. For this !15 nm diameter Ge nanowire, we also find that 14−18 modes are occupied at room temperature under ON-current conditions with ION/IOFF ) 100. To observe true one-dimensional transport in a 〈110〉Ge nanowire transistor, the nanowire diameter would have to be less than about 5 nm. The methodology described here should prove useful for analyzing and comparing on a common basis nanowire transistors of various materials and structures.