3-D integration of 10-GHz filter and CMOS receiver front-end

Tae-young Choi, Purdue University
Hasan Sharifi, Purdue University - Main Campus
Hjalti Sigmarsson, Purdue University
William J. Chappell, School of Electrical and Computer Engineering, Birck Nanotechnology Center, Purdue University
Saeed Mohammadi, School of Electrical and Computer Engineering, Purdue University
Linda Katehi, School of Electrical and Computer Engineering, Purdue University

Date of this Version


This document has been peer-reviewed.



A 10-GHz filter/receiver module is implemented in a novel 3-D integration technique suitable for RF and microwave circuits. The receiver designed and fabricated in a commercial 0.18-mu m CMOS process is integrated with embedded passive components fabricated on a high-resistivity Si substrate using a recently developed self-aligned wafer-level integration technology. Integration with the filter is achieved through bonding a high-Q evanescent-mode cavity filter onto the silicon wafer using screen printable conductive epoxy. With adjustment of the input matching of the receiver integrated circuit by the embedded passives fabricated on the Si substrate, the return loss, conversion gain, and noise figure of the front-end receiver are improved. At RF frequency of 10.3 GHz and with an IF frequency of 50 MHz, the integrated front-end system achieves a conversion gain of 19 dB, and an overall noise figure of 10 dB. A fully integrated filter/receiver on an Si substrate that operates at microwave frequencies is demonstrated.