Optimization of design and fabrication processes for realization of a PDMS-SOG-silicon DNA amplification chip

S Bhattacharya, Department of Biological Engineering, University of Missouri
Y Gao, Department of Electrical and Computer Engineering, University of Missouri
V Korampally, Department of Electrical and Computer Engineering, University of Missouri
M T. Othman, Department of Electrical and Computer Engineering, University of Missouri
S A. Grant, University of Missouri
S B. Kleiboeker, University of Missouri
K Gangopadhyay, University of Missouri
S Gangopadhyay, University of Missouri

Date of this Version




This document has been peer-reviewed.



A novel on-chip inexpensive platform to perform DNA amplification has been fabricated by optimizing the design and microfabrication processes using polydimethyl siloxane (PDMS) and silicon. The silicon base contains a set of microfabricated platinum heater structures on the bottom with a 140-nm-thick spin-on-glass (SOG) layer on the top and a 3 mu l replica molded PDMS chamber with feed channels and inlet-outlet ports bonded to this film. The plasma exposed SOG surface is found to undergo recovery of hydrophobicity with time as indicated by an increase in advancing contact angle and bonds very well to another plasma exposed PDMS piece. The bonding protocol developed can be used for a diverse range of substrates, which may form a basis for integration of fluidic assays with microelectronics. The hydrophobic recovery of the microchamber and channels also eliminate the need for various surface passivation techniques for polymerase chain reaction (PCR) chips. A thermal cycler with flexible PCR cycle control is designed and implemented by using a sensing thermocouple. The amplification has been tested using picogram-level template DNA concentration. We have further been able to show negligible nonspecific binding of the template DNA to the hydrophobic interiors of our device by fluorescence measurements and have been able to successfully demonstrate the possibility of multiple usage of this chip without cross-contamination from the previous run.