Self-aligned wafer-level integration technology with an embedded faraday cage for substrate crosstalk suppression

Hasan Sharifi, Purdue University - Main Campus
Saeed Mohammadi, School of Electrical and Computer Engineering, Purdue University

Date of this Version


This document has been peer-reviewed.



A modification to a recently developed chip/wafer integration technology has proven to be very effective in suppressing the substrate crosstalk for mixed signal systems. In this implementation, analog and digital chips are fabricated on separate dies, and then integrated on a single Si substrate using a Self-Aligned Wafer-Level Integration Technology. A truly grounded faraday-cage structure is realized by sidewall metallization around each die resulting in an ultimate substrate noise reduction. Any planar chip with any thickness can be used in this technology. Simulation and measurement results show that when a high - resistivity silicon substrate as an integration medium is used along with grounded faraday cage, substrate coupling is suppressed to less than -60 dB for frequencies up to 25 GHz. For a low-resistivity silicon substrate, the substrate coupling is a dominant mechanism in generating mixed-signal noise, however, when sidewall metallization as faraday cage is utilized, the substrate coupling is reduced by at least 20 dB for frequencies below 25 GHz. The substrate noise suppression is higher than 35 dB for frequencies below 2 GHz. To our knowledge, these are the best values reported for isolation improvement of thick silicon substrates at microwave frequencies.