Inversion capacitance-voltage studies on GaAs metal-oxide-semiconductor structure using transparent conducting oxide as metal gate

T Yang, Purdue University
Y Liu, Purdue University
P. D. Ye, Birck Nanotechnology Center and School of Electrical and Computer Engineering, Purdue University
Yi Xuan, Purdue University
H Pal, Purdue University
Mark S. Lundstrom, School of Electrical and Computer Engineering, Birck Nanotechnology Center, Purdue University

Date of this Version

June 2008



This document has been peer-reviewed.



A systematic capacitance-voltage (C-V) study has been performed on GaAs metal-oxide-semiconductor (MOS) structures with atomic-layer-deposited Al2O3 as gate dielectrics and indium tin oxide (ITO) as the metal gate. The transparent conducting ITO gate allows homogeneous photoillumination on the whole MOS capacitance area, such that one can easily observe the low-frequency (LF) C-V and quasistatic C-V of GaAs at room temperature. The semiconductor capacitance effect on GaAs MOS devices has also been identified and insightfully discussed based on the obtained LF C-V curves. The semiconductor capacitance effect becomes more important for devices with high-mobility channel materials and aggressively scaled high-k gate dielectrics.