Optimization of ON-state and switching performances for 15-20-kV 4H-SiC IGBTs

TOMOHIRO TAMAKI, PURDUE UNIVERSITY
Ginger G. Walden, Birck Nanotechnology Center, Purdue University
Yang Sui, Purdue University
James A. Cooper, Birck Nanotechnology Center, Purdue University

Date of this Version

8-1-2008

This document has been peer-reviewed.

 

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Article available at: http://ieeexplore.ieee.org/search/wrapper.jsp?arnumber=4578888

Abstract

The 4H-SiC p-channel IGBTs designed to block 15 and 20 kV are optimized for minimum loss (ON-state plus switching power) by adjusting the parameters of the p JFET region, p- drift layer, and p+ buffer layer, using 2-D MEDICI simulations. Switching loss exhibits a strong dependence on buffer layer thickness,, doping, and lifetime due to their influence on the current tail. In contrast, drift layer lifetime has little effect on the crossover frequency at which the MOSFET and IGBT have equal loss.

 

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