"Zero" Drain-Current Drift of Inversion-Mode NMOSFET on InP(111)A Surface

Chen Wang, Purdue University; Fudan University
Min Xu, Purdue University
Robert Colby, Birck Nanotechnology Center, Purdue University
David Wei Zhang, Fudan University
Peide D. Ye, Birck Nanotechnology Center, Purdue University

Date of this Version



Electrochem. Solid-State Lett. 2012 volume 15, issue 2, H27-H30


Inversion-mode n-channel metal-oxide-semiconductor field-effect transistors with atomic-layer-deposited Al2O3 as gate dielectric were fabricated on two crystalline surfaces: InP (100) and InP (111) A. A record high drain current of 600 mu A/mu m is obtained on InP (111) A surface at V-ds = V-gs = 3 V with a gate length of 1 mu m and Al2O3 dielectric thickness of 8 nm. The maximum drain current is greater by a factor of 3.5 on the InP (111) A surface compared to devices fabricated on the InP (100) surface at the same bias conductions. During room temperature positive gate stress, "zero" drain current drift is observed for InP (111) A devices, in great contrast to InP(100) devices. The greater maximum drain current and the "zero" drain current drift on InP (111) A can be explained by oxide band bending caused by trap neutral level shifts and low border trap density. (C) 2011 The Electrochemical Society. [DOI: 10.1149/2.012202esl] All rights reserved.


Nanoscience and Nanotechnology