Single-walled carbon nanotube transistors fabricated by advanced alignment techniques utilizing CVD growth and dielectrophoresis
Date of this Version8-1-2008
This document has been peer-reviewed.
Single-walled carbon nanotube field effect transistors (SWNT-FETs) are fabricated by two different alignment techniques. The first technique is based on direct synthesis of an aligned SWNTs array on quartz wafer using chemical vapor deposition. The transistor with three SWNTs and atomic layer deposited (ALD) Al2O3 gate oxide shows a contact resistance of 280 K Omega, a maximum on-current of -7 mu A, and a high I-on/I-off ratio (>10(3)). The second technique is based on room temperature self-assembly of SWNT bundles using dielectrophoresis. By applying AC electric fields, we have aligned nanotube bundles between drain and source contact patterns of a transistor at room temperature. Transistors based on twisted bundle of SWNTs show high contact resistance (M Omega range) and low current drive in the order of tens of nA. (C) 2008 Elsevier Ltd. All rights reserved.