A wideband CMOS distributed amplifier with slow-wave shielded transmission lines

Rosa R. Lahiji, Case Western Reserve University; W Wireless Hlth Inst, La Jolla
Linda Katehi, University of California Davis
Saeed Mohammadi, Birck Nanotechnology Center, Purdue University

Date of this Version



International Journal of Microwave and Wireless Technologies. Volume 3, Issue 1 February 2011, pp. 59-66. A wideband CMOS distributed amplifier with slow-wave shielded transmission lines. Rosa R. Lahiji, Linda P.B. Katehi and Saeed Mohammadi


A four-stage distributed amplifier utilizing low-loss slow-wave shielded (SWS) transmission lines is implemented in a standard 0.13 mm Complementary Metal-Oxide-Semiconductor (CMOS) technology. The amplifier when biased in its high current operating mode of I-Dtotal = 46 mA (at V-dd = 2.2 V, P-diss = 101 mW) provides a forward transmission gain of 11.3 +/- 1.5 dB with a 3-dB bandwidth of 17 GHz and a gain-bandwidth product of 74 GHz. The noise figure (NF) under the same bias condition is better than 8.5 dB up to 10 GHz. The measured output-referred 1-dB compression point is higher than +2 dBm. The amplifier is also measured under low-bias condition of I-Dtotal 18 mA (at V-dd = 1.15 V, P-diss = 20.7 mW). It provides a transmission gain of 6.6 +/- 1 dB, a 3-dB bandwidth of 14.8 GHz, a gain-bandwidth product of 35.5 GHz, and a NF of better than 8.6 dB up to 10 GHz. Despite using a simple four-stage cascode design, this distributed amplifier achieves very high-gain-bandwidth product at a relatively low DC power compared to the state of the art CMOS distributed amplifiers reported in the literature. This is due to the incorporation of low-loss SWS coplanar waveguide (CPW) transmission lines with a loss factor of nearly 50% of that of standard transmission lines on CMOS-grade Si substrate.


Nanoscience and Nanotechnology