Department of Electrical and Computer Engineering Technical ReportsCopyright (c) 2019 Purdue University All rights reserved.
https://docs.lib.purdue.edu/ecetr
Recent documents in Department of Electrical and Computer Engineering Technical Reportsen-usWed, 17 Apr 2019 02:33:04 PDT3600Composable, Sound Transformations of Nested Recursion and Loops
https://docs.lib.purdue.edu/ecetr/756
https://docs.lib.purdue.edu/ecetr/756Mon, 15 Apr 2019 04:46:52 PDT
Scheduling transformations reorder a program’s operations to improve locality and/or parallelism. The polyhedral model is a general framework for composing and applying instancewise scheduling transformations for loop-based programs, but there is no analogous framework for recursive programs. This paper presents an approach for composing and applying scheduling transformations—like inlining, interchange, and code motion—to nested recursive programs. This paper describes the phases of the approach—representing dynamic instances, composing and applying transformations, reasoning about correctness—and shows that these techniques can verify the soundness of composed transformations.
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Kirshanthan Sundararajah et al.Ladder Networks for Semi-Supervised Hyperspectral Image Classification
https://docs.lib.purdue.edu/ecetr/755
https://docs.lib.purdue.edu/ecetr/755Sun, 02 Dec 2018 21:27:01 PST
We discuss the ladder network to perform hyperspectral image classification in a semi-supervised setting. The ladder network distinguishes itself from other semi-supervised methods by jointly optimizing a supervised and unsupervised cost. In many settings this has proven to be more successful than other semi-supervised techniques, such as pretraining using unlabeled data. We furthermore show that the convolutional ladder network outperforms most of the current techniques used in hyperspectral image classification and achieves new state-of-the-art performance on the Pavia University dataset given only 5 labeled data points per class.
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okan ersoy et al.DISC: A Method for Dynamic Intelligent Scheduling and Control of Reconfigurable Parallel Architectures
https://docs.lib.purdue.edu/ecetr/646
https://docs.lib.purdue.edu/ecetr/646Fri, 30 Nov 2018 02:13:20 PST
This work studies the use of intelligence-guided control of reconfigurable parallel processing systems. A reconfigurable architecture is one that can be partitioned into several independent virtual parallel machines operating in either SIMD or MIMD mode. Reconfigurable systems, while allowing great flexibility, present many scheduling and control problems. Scheduling tasks on such a system is an exponential time problem. Therefore, in an effort to achieve reduced, task execution time without incurring unacceptable scheduling costs, an expert system is used to apply heuristics to approximate an optimal schedule. When the execution time of a task is not known a priori, conventional scheduling methods which produce optimal or near-optimal Schedules cannot be used effectively. A dynamic controller, however, is not locked into a static schedule and pan reconfigure the machine and process subtasks based on the current state of the parallel processing system. The scheduling system attempts to achieve decreased execution time by balancing the overall processing scenario of the task with the needs of the individual routines that make up the task. Repartitioning is done when either the processor’s resources need to be split among the subtasks or the processor’s resources have become fragmented and need to be merged into larger partitions. The scheduler keeps track of what subtasks are potentially executable and chooses the best candidate by considering the relative importance of quickly finishing the subtask and the matching of partition data contents and subtask data needs.
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F. j. Weil et al.Wide and Deep Neural Networks in Remote Sensing: A Review
https://docs.lib.purdue.edu/ecetr/754
https://docs.lib.purdue.edu/ecetr/754Fri, 30 Nov 2018 01:10:07 PST
Wide and deep neural networks in multispectral and hyperspectral image classification are discussed. Wide versus deep networks have always been a topic of intense interest. Deep networks mean large number of layers in the depth direction. Wide networks can be defined as networks growing in the vertical direction. Then, wide and deep networks are networks which have growth in both vertical and horizontal directions. In this report, several directions in order to achieve such networks are described. We first review a methodology called Parallel, Self-Organizing, Hierarchical Neural Networks (PSHNN’s) which have stages growing in the vertical direction, and each stage can be a deep network as well. In turn, each layer of a deep network can be a PSHNN. The second methodology involves making each layer of a deep network wide, and this has been discussed especially with deep residual networks. The third methodology is wide and deep residual neural networks which grow both in horizontal and vertical directions, and include residual learning principles for improving learning. The fourth methodology is wide and deep neural networks in parallel. Here wide and deep networks are two parallel branches, the wide network specializing in memorization while the deep network specializing in generalization. In leading to these methods, we also review various types of PSHNN’s, deep neural networks including convolutional neural networks, autoencoders, and residual learning. Partially due to moderate sizes of current multispectral and hyperspectral image sets, design and implementation of wide and deep neural networks hold the potential to yield most effective solutions. These conclusions are expected to be valid in other areas with similar data structures as well.
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okan ersoyMinimizing Quotient Space Norms Using Penalty Functions
https://docs.lib.purdue.edu/ecetr/753
https://docs.lib.purdue.edu/ecetr/753Tue, 13 Nov 2018 03:09:07 PST
A penalty function method approach is proposed to solve the general problem of quotient space norms minimization. A new class of penalty functions is introduced which allows one to transform constrained optimization problems of quotient space norms minimization by unconstrained optimization problems. The sharp bound on the weight parameter is given for which constrained and unconstrained problems are equivalent. Also a computationally efficient bound on the weight parameter is given. Numerical examples and computer simulations illustrate the results obtained.
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Stefen Hui et al.Generalized 'Probe' Model for Arbitrary Dephasing Mechanisms
https://docs.lib.purdue.edu/ecetr/752
https://docs.lib.purdue.edu/ecetr/752Tue, 13 Nov 2018 03:09:00 PST
It has been shown earlier that in the linear response regime, dephasing by point scatterers (within the self-consistent Born approximation) can be visualized in terms of point voltage probes attached to each space and energy coordinate (r,E). In this paper we derive a generalized linear response equation starting from the non-equilibrium Green function formalism that can be used to describe any dephasing process in any approximation. The dephasing is characterized by a ‘reservoir function’ which can be evaluated from the self-energy. The linear response equation can be visualized in terms of voltage probes but with individual probes connected to each pair of spatial coordinates and to each energy (r,r',E ). Unlike point scatterers, this generalized ‘probe’ model allows us to introduce phase relaxation without necessarily introducing momentum relaxation. We obtain explicit expressions for the transmission Tij from terminal ‘j ’ to terminal T by eliminating the ‘floating probes’ inside the device. These expressions for Tij clearly show the role of the exclusion principle in determining the transmission. Proof of reciprocity in multiterminal conductors is provided. We also present a simple illustrative example calculating Tij for a short single-moded electron waveguide with electron-phonon interactions. An important difference between the present formulation and usual linear response theory is that the electrochemical potential difference is treated as the driving force; however, we do not neglect the self-consistent fields that appear in an interacting system when a small bias is applied.
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Supriyo DattaNeural Networks for Constrained Optimization Problems
https://docs.lib.purdue.edu/ecetr/751
https://docs.lib.purdue.edu/ecetr/751Tue, 13 Nov 2018 03:08:51 PST
This paper is concerned with utilizing neural networks and analog circuits to solve constrained optimization problems. A novel neural network architecture is proposed for solving a class of nonlinear programming problems. The proposed neural network, or more precisely a physically realizable approximation, is then used to solve minimum norm problems subject to linear constraints. Minimum norm problems have many applications in various areas, but we focus on their applications to the control of discrete dynamic processes. The applicability of the proposed neural network is demonstrated on numerical examples
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Walter E. Lillo et al.Data Structures and Sparsity in a Digital Simulation of an HVDC Link
https://docs.lib.purdue.edu/ecetr/750
https://docs.lib.purdue.edu/ecetr/750Tue, 13 Nov 2018 03:08:45 PST
An earlier algorithm for the detailed simulation of the High Voltage Direct Current (HVDC) link using the tensor approach was modified to improve the runtime speed. The runtime, approximately eleven percent that of the original algorithm, was improved by employing sparsity techniques, restructuring the state matrix, and condensing subroutines. The readability of the code was accomplished by a modular programming approach. This research was done for a two-terminal simulation, but could be expanded and modified to include multiterminal simulations.
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Mark Timothy LuehmannMethodologies for Voltage Contingency Ranking
https://docs.lib.purdue.edu/ecetr/749
https://docs.lib.purdue.edu/ecetr/749Tue, 13 Nov 2018 03:08:38 PST
Contingency studies in interconnected electric power systems are performed to assess the capability of a system to withstand disturbances caused by equipment outages and other factors, and are relevant to the area of power system security. Due to the large size and complexity of modern power systems, accurate techniques for measuring the effect of line contingencies are often time consuming and impose a heavy computational burden. Thus, ranking methods are used to define a subset of the most severe contingencies to be studied in full detail. Contingencies are classified into voltage contingencies and power contingencies; the term voltage contingency refers to cases of bus voltage magnitude out of range, and the term power contingency refers to the case of line power flow out of range (overloads). The purpose of this research is to examine the singular value decomposition of a voltage sensitivity matrix derived from the Jacobian matrix of the Newton-Raphson power flow equation and its relationship to voltage contingency ranking. Possible ways of using the singular values in a bus voltage ranking performance index will also be studied. Additionally, methods of assessing the accuracy of contingency ranking performance indices will be considered. Proposed enhancements to these strategies and recommendations for further research will be discussed.
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James Matthew KulagaToward a Robust Minimum Variance Beamformer for Multi-Rank Signal Via Mini-Max Processing Final Technical Report
https://docs.lib.purdue.edu/ecetr/748
https://docs.lib.purdue.edu/ecetr/748Tue, 13 Nov 2018 03:08:30 PST
A variation of Minimum Variance Distortionless Response (MVDR) based Match Field Processing (MFP) referred to as Semi-coherent MVDR MFP has been developed; Initial simulation results presented here indicate that Semi-coherent MVDR MFP is both relatively robust to mismatch, with respect to relative amplitudes and phases amongst multipath arrivals in an isovelocity ocean, and comparable in performance to Full-coherent MVDR MFP under no mismatch conditions. Full-coherent MVDR MFP assumes complete and perfect characterization of the underwater propagation channel and is extremely sensitive to mismatch between assumed model parameters and actual environmental parameters. Three main conclusions may be drawn from the simulation results and deduced by analysis as well: Full-coherent MVDR MFP is extremely sensitive to mismatch. A 2 m error in the assumed ocean depth caused between a 15 and 25 dB drop in the peak of the Full-coherent MVDR MFP ambiguity surface at the true source location relative to that obtained in the no mismatch case. The performance of the "Incoherent" MVDR MFP scheme proposed by Krolik et. al. [1] is substantially degraded relative to that of Full-coherent MVDR MFP in the no mismatch case. The peak of the "Incoherent" MVDR MFP ambiguity surface with no mismatch was between 10 and 15 dB less than that of the corresponding Full-coherent MVDR MFP ambiguity surface. The performance of Semi-coherent MVDR MFP is both relatively robust to mismatch, with respect to error in the assumed ocean depth, and comparable in performance to Full-coherent MVDR MFP under no mismatch conditions. The three versions of MVDR MFP, Full-coherent, "Incoherent", and Semi-Coherent, are described in detail in Sections 2 and 3 of this report.
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Michael D. Zoltowski et al.Blockwise Transform Image Coding Enhancement and Edge Detection
https://docs.lib.purdue.edu/ecetr/747
https://docs.lib.purdue.edu/ecetr/747Tue, 13 Nov 2018 03:08:24 PST
The goal of this thesis is high quality image coding, enhancement and edge detection. A unified approach using novel fast transforms is developed to achieve all three objectives. Requirements are low bit rate, low complexity of implementation and parallel processing. The last requirement is achieved by processing the image in small blocks such that all blocks can be processed simultaneously. This is similar to biological vision. A major issue is to minimize the resulting block effects. This is done by using proper transforms and possibly an overlap-save technique. The bit rate in image coding is minimized by developing new results in optimal adaptive multistage transform coding. Newly developed fast trigonometric transforms are also utilized and compared for transform coding, image enhancement and edge detection. Both image enhancement and edge detection involve generalised bandpass filtering wit fast transforms. The algorithms have been developed with special attention to the properties of biological vision systems.
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Sabzali AghagolzadehExploiting Fine-Grain Concurrency Analytical Insights in Superscalar Processor Design
https://docs.lib.purdue.edu/ecetr/746
https://docs.lib.purdue.edu/ecetr/746Tue, 13 Nov 2018 03:08:17 PST
This dissertation develops analytical models to provide insight into various design issues associated with superscalar-type processors, i.e., the processors capable of executing multiple instructions per cycle. A survey of the existing machines and literature has been completed with a proposed classification of various approaches for exploiting fine-grain concurrency. Optimization of a single pipeline is discussed based on an analytical model. The model-predicted performance curves are found to be in close proximity to published results using simulation techniques. A model is also developed for comparing different branch strategies for single-pipeline processors in terms of their effectiveness in reducing branch delay. The additional instruction fetch traffic generated by certain branch strategies is also studied and is shown to be a useful criterion for choosing between equally well performing strategies. Next, processors with multiple pipelines are modelled to study the tradeoffs associated with deeper pipelines versus multiple pipelines. The model developed can reveal the cause of performance bottleneck: insufficient resources to exploit discovered parallelism, insufficient instruction stream parallelism, or insufficient scope of concurrency detection. The cost associated with speculative (i.e., beyond basic block) execution is examined via probability distributions that characterize the inherent parallelism in the instruction stream. The throughput prediction of the analytic model is shown, using a variety of benchmarks, to be close to the measured static throughput of the compiler output, under resource and scope constraints. Further experiments provide misprediction delay estimates for these benchmarks under scope constraints, assuming beyond-basic-block, out-of-order execution and run-time scheduling. These results were derived using traces generated by the Multiflow TRACE SCHEDULING™(*) compacting C and FORTRAN 77 compilers. A simplified extension to the model to include multiprocessors is also proposed. The extended model is used to analyze combined systems, such as superpipelined multiprocessors and superscalar multiprocessors, both with shared memory. It is shown that the number of pipelines (or processors) at which the maximum throughput is obtained is increasingly sensitive to the ratio of memory access time to network access delay, as memory access time increases. Further, as a function of inter-iteration dependency distance, optimum throughput is shown to vary nonlinearly, whereas the corresponding Optimum number of processors varies linearly. The predictions from the analytical model agree with published results based on simulations. (*)TRACE SCHEDULING is a trademark of Multiflow Computer, Inc.
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Pradeep K. Dubey et al.Computing Torque and Related Output Variables of a Switched ReluctanceMachine Using a Magnetic Circuit Approach
https://docs.lib.purdue.edu/ecetr/745
https://docs.lib.purdue.edu/ecetr/745Tue, 13 Nov 2018 03:08:11 PST
The normal procedure industry employs in designing a Switched Reluctance Machine (SRM) is to construct and test a prototype to determine the machine's actual output characteristics. This procedure is time-consuming and does not allow for an accurate insight into machine dynamics. This research project consists of an analytical method for determining torque, current, and flux linkages of an SRM. A magnetic circuit modelling approach is employed for this research and the machine dimension parameters of the SRM as well as the B-H curve magnetization characteristics are utilized. The objective of the magnetic circuit modelling approach is to obtain results which will be comparable to a machine modelled using the finite element method of flux determination. The magnetic circuit analysis uses a systematic approach for calculating the reluctances of the air gap between the stator and rotor poles in a typical SRM. The end result of the magnetic circuit model is a non-linear function with respect to flux. The operating characteristics of the SRM are modelled mathematically by using first-order differential equations of flux linkages with respect to current and rotor position. Rapid speed in calculation of the operating characteristics of an SRM results from the precalculation of the flux linkage to current relationship.
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Matthew E. ToenniesEfficient Importance sampling Simulations for Digital Communication Systems
https://docs.lib.purdue.edu/ecetr/744
https://docs.lib.purdue.edu/ecetr/744Tue, 13 Nov 2018 03:08:05 PST
Importance sampling is a- modified. Monte Carlo simulation technique which can dramatically reduce the computational cost of the Monte Carlo method. A complete development is presented for its use in the estimation of bit error rates /V for digital communication systems with small Gaussian noise inputs. Emphasis is on the optimal mean-translation Gaussian simulation density function design and the event simulation method as applied to systems which employ quasi-regular trellis codes. These codes include the convolutional codes and many TCM (Ungerboeck) codes. Euclidean distance information of a code is utilized to facilitate the simulation. Also, the conditional importance sampling technique is presented which can handle many non-Gaussian system inputs. Theories as well as numerical examples are given. In particular, we study the simulations of an uncoded MSK and a trellis-coded 8- PSK transmissions over a general bandlimited nonlinear satellite channel model. Our algorithms are shown to be very efficient at low Pb compared to the ordinary Monte Carlo method. Many techniques we have developed are applicable to other system simulations as building blocks for their particular system configurations and channels.
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Jyun-Cheng ChenReal-Time Helicopter Flight Control Test Bed
https://docs.lib.purdue.edu/ecetr/743
https://docs.lib.purdue.edu/ecetr/743Tue, 13 Nov 2018 03:07:59 PST
The goal of this paper is to describe a test bed for real-time helicopter flight control systems and some initial control experiments utilizing the test bed. The developed test bed consists of an off-the-shelf radio control helicopter which has been modified so that it can be computer controlled. The helicopter is mounted on a sensor equipped test fixture which provides information on the helicopter's position and attitude while allowing it to move freely within some limited area. In this paper we describe the hardware and software developed to allow real-time helicopter flight control and plant identification. In addition we propose a dynamic model for the miniature helicopter plant and use this model to design a linearized feedback controller for hovering.
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Toby J. Pallett et al.Tree-Structured Nonlinear Adaptive Signal Processing
https://docs.lib.purdue.edu/ecetr/742
https://docs.lib.purdue.edu/ecetr/742Tue, 13 Nov 2018 03:07:53 PST
In communication systems, nonlinear adaptive filtering has become increasingly popular in a variety of applications such as channel equalization, echo cancellation and speech coding. However, existing nonlinear adaptive filters such as polynomial (truncated Volterra series) filters and multilayer perceptrons suffer from a number of problems. First, although high Order polynomials can approximate complex nonlinearities, they also train very slowly. Second, there is no systematic and efficient way to select their structure. As for multilayer perceptrons, they have a very complicated structure and train extremely slowly Motivated by the success of classification and regression trees on difficult nonlinear and nonparametfic problems, we propose the idea of a tree-structured piecewise linear adaptive filter. In the proposed method each node in a tree is associated with a linear filter restricted to a polygonal domain, and this is done in such a way that each pruned subtree is associated with a piecewise linear filter. A training sequence is used to adaptively update the filter coefficients and domains at each node, and to select the best pruned subtree and the corresponding piecewise linear filter. The tree structured approach offers several advantages. First, it makes use of standard linear adaptive filtering techniques at each node to find the corresponding Conditional linear filter. Second, it allows for efficient selection of the subtree and the corresponding piecewise linear filter of appropriate complexity. Overall, the approach is computationally efficient and conceptually simple. The tree-structured piecewise linear adaptive filter bears some similarity to classification and regression trees. But it is actually quite different from a classification and regression tree. Here the terminal nodes are not just assigned a region and a class label or a regression value, but rather represent: a linear filter with restricted domain, It is also different in that classification and regression trees are determined in a batch mode offline, whereas the tree-structured adaptive filter is determined recursively in real-time. We first develop the specific structure of a tree-structured piecewise linear adaptive filter and derive a stochastic gradient-based training algorithm. We then carry out a rigorous convergence analysis of the proposed training algorithm for the tree-structured filter. Here we show the mean-square convergence of the adaptively trained tree-structured piecewise linear filter to the optimal tree-structured piecewise linear filter. Same new techniques are developed for analyzing stochastic gradient algorithms with fixed gains and (nonstandard) dependent data. Finally, numerical experiments are performed to show the computational and performance advantages of the tree-structured piecewise linear filter over linear and polynomial filters for equalization of high frequency channels with severe intersymbol interference, echo cancellation in telephone networks and predictive coding of speech signals.
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C. S. Ravishankar et al.Development, Demonstration, and Device Physics of FET-Accessed One-Transistor GaAs Dynamic Memory Technologies
https://docs.lib.purdue.edu/ecetr/741
https://docs.lib.purdue.edu/ecetr/741Tue, 13 Nov 2018 03:07:45 PST
The introduction of digital GaAs into modem high-speed computing systems has led to an increasing demand for high-density memory in these GaAs technologies. To date, most of the memory development efforts in GaAs have been directed toward four- and six-transistor static RAM's, which consume substantial chip area and dissipate much static power resulting in limited single-chip GaAs storage capacities. As it has successfully done in silicon, a one-transistor dynamic RAM approach could alleviate these problems making higher density GaAs memories possible. This dissertation discusses theoretical and experimental work that presents the possibility for a high-speed, low-power, one-transistor dynamic RAM technology in GaAs. The two elements of the DRAM cell, namely the charge storage capacitor and the access field-effect transistor have been studied in detail. Isolated diode junction charge storage capacitors have demonstrated 30 minutes of storage time at room temperature with charge densities comparable to those obtained in planar silicon DRAM capacitors. GaAs JFET and MESFET technologies have been studied, and with careful device design and choice of proper operating voltages experimental results show that both can function as acceptable access transistors. One-transistor MESFET- and JFET-accessed DRAM cells have been fabricated and operated at room temperature and above with a standby power dissipation that is only a small fraction of the power dissipated by the best commercial GaAs static RAM cells. A 2 x 2 bit demonstration array was built and successfully operated at room temperature to demonstrate the addressable read/write capability of this new technology.
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P. G. Neubeck et al.Predictive Adaptive Control of Multiple Robots in Cooperative Motion
https://docs.lib.purdue.edu/ecetr/740
https://docs.lib.purdue.edu/ecetr/740Tue, 13 Nov 2018 03:07:39 PST
In this paper we address the problem of controlling multiple robots manipulating a rigid object cooperatively when the robots and load parameters are uncertain. We propose a controller that takes into account the dynamics of both the load and the manipulators. The linearity of the dynamics of the robots and the load, with respect to the unknown parameters, is exploited during the derivation of the parameter adaptation scheme. In order to design a control and update laws that do not require the measurements of the of the joint accelerations or the load acceleration, the dynamics of both the robots and the load are filtered through a stable first order filter. Then two prediction error vectors are defined as the difference between the measured filtered dynamics and the predicted filtered dynamics of both the robots and the load. The least-squares estimation method is used to estimate the parameters of the multi-robot system from the prediction errors. We then develop a controller that is based on the cancellation of the nonlinearities. The proposed controller guarantees global asymptotic tracking of the robot and load trajectories and also guarantees the asymptotic tracking of the internal forces trajectories.
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Mohamed Zribi et al.Silicon Nitride Deposition, Chromium Corrosion Mechanisms and Source/Drain Parasitic Resistance in Amorphous Silicon Thin Film transistors
https://docs.lib.purdue.edu/ecetr/739
https://docs.lib.purdue.edu/ecetr/739Tue, 13 Nov 2018 03:07:33 PST
Hydrogenated amorphous silicon (a-Si:H) based thin film transistors (TFTs) are finding increased application as switching elements in active-matrix liquid crystal displays (AMLCDs). Extensive research has been focussed on optimizing fabrication conditions to improve materials quality and on reducing channel length to increase device speed. However, the basic physics and chemistry have not yet been fully understood. In addition, little attention has been paid to the significant effect of source/drain parasitics. The work described in this thesis is closely related to the speed and stability issues on the discrete device level. Specifically, the influence of gate nitride deposition and its NH3 plasma treatment has been studied. The competing effects of nitridation reaction and radiation damage were found to cause an interesting trade-off between the device stability and speed. Further effort was devoted to the analysis of an important TFT failure phenomenon. Both electrical and spectroscopic techniques were utilized for gate Cr corrosion studies. It was determined that the corrosion was largely promoted by the CF4 plasma exposure of Cr during the fabrication. Finally, new test structures were designed, fabricated and characterized to study the source/drain parasitic resistance.
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Shengwen Luan et al.Computer Simulation and Device Physics of SiGe Heterojunction Bipolar Transistors
https://docs.lib.purdue.edu/ecetr/738
https://docs.lib.purdue.edu/ecetr/738Tue, 13 Nov 2018 03:07:27 PST
Recent advances in semiconductor growth technology have enabled the growth of SiGe strained layers on silicon substrates. Si/SiGe technology has a promising future, especially in microwave HBT applications. This work describes the development of an existing two-dimensional drift-diffusion device simulation program for accurate modelling of SiGe heterojunction bipolar transistors (HBT's). PUPHS2D (Purdue University Program for Heterostructure Simulation in Two Dimensions) was formulated by Paul Dodd [Dod89] as an AlGaAs/GaAs HBT simulation tool. This work describes the extension of this program to the silicon and Si 1|_xGex material systems. The computer model allows the user to explore internal device physics as well as terminal characteristics of a device. Field-dependent mobility has been added to the program in order to more accurately compute high-field transport phenomena. The simulation tool is used to study the performance of silicon bipolar transistors and Si/SiGe HBT's, and these results are presented in chapter 4.
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Troy Thomas Herman