Phase change memory (PCM) is emerging as a lead alternative to DRAM due to its good combination of speed, density,
energy, and reliability. However, PCM can endure far fewer overwrites than DRAM before wearing out. PCM is susceptible to
malicious or accidental overwrites which can wear out a frame in a few hundreds of seconds. Previous papers have proposed to
randomize periodically the address-to-frame mapping in a memory region. Each randomization involves remapping the region’s
memory blocks which incurs significant write overhead. To guarantee reasonable worst-case lifetimes, the papers assume that
every write overwrites the same memory block and incur either high write overhead for normal applications (i.e., the common
case), or permanent, high hardware overhead (i.e., in all cases). We make the key observation that the overwrite rates of normal
applications (i.e., common case) are orders-of-magnitude lower than that of the worst case. However, naively measuring the
overwrite rate using brute-force hardware would incur significant complexity and power. Instead, we apply basic statistical sampling
to estimate accurately the overwrite rate while requiring a small sampling buffer. Our approach, called statistical wear leveling
(SWL), which randomizes address-to-frame mapping on the basis of the estimated overwrite rates instead of write
rates. SWL achieves both lower common-case write overhead and lower hardware overhead, and similar, high common-case
lifetime as compared to the previous schemes while achieving reasonable worst-case lifetime.
1 Introduction
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