A new insulated gate bipolar transistor structure, the 3D-IGBT, is presented. The 3D-IGBT utilizes selective epitaxial silicon to form a top contacted anode and still retain the cellular structure of vemcally oriented devices. The 3D-IGBT , unlike other fully integrable power devices, exploits the merits of cellular structure to increase its packing density and thus reduce its on-resistance per unit area. It also eliminates the parasitic JFET resistance found in vertical IGBT's. To integrate the 3D-IGBT with low power devices, the QDI method of device isolation is also presented. QDI uses a combination of JI and DI to electrically isolate low and high power devices. It has been shown that the selective epitaxial silicon grown in deep trenches is of device quality and that the use of a trench structure to facilitate isolation and control of SEG thickness should be ideal in applications where the thickness and resistivity of the control and power areas are independently optimized. Electrical feasibility of the 3D-IGBT is demonstrated. Averaged results from several 3D-IGBT devices indicate that the RIE sidewall treatment techniques have a negligible effect on the DC characteristics of the device. When scaled, the on-resistance of the 3D-IGBT was shown to be significantly less than the lateral IGBT; mainly due to the increased packing density of the 3D-IGBT. Latch-up current for the fabricated devices was as high as 1,361 Ncm2 and according to PISCES data, can be improved even further by reducing the latch-up implant offset distance. Finally, structural feasibility of a minimum 3D-IGBT device was demonstrated by the successful growth of more than 5 microns of selective silicon out of a 10 micron wide, 5 micron deep trench. The 3D-IGBT device represents the frrst integrable power device with a cellular layout structure and thus provides the desired ability to lower on-resistance by increasing the device's channel density, a capability previously afforded only to discrete, vertical power devices.

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