Currently, three-terminal devices with N-shaped I-V characteristics are being fabricated for switching and multi-valued logic applications. The purpose of this study is to investigate switching speed improvements and potential problems of circuit designs employing these nonlinear devices. In this work, both two-terminal and three-terminal devices are analyzed. A design methodology is developed for a second-order twoterminal device circuit and a novel method of I-V characterization is presented. For the three-terminal device, a simple PSpice macromodel is developed and a new figure of merit for switching speed improvement is given. A practical chaotic synthesis method is proposed for this device in a third-order autonomous feedback circuit. The success of this synthesis approach leads to a prediction of possible chaotic behavior in switching co gurations

Date of this Version

December 1995