An investigation of silicon carbide surfaces and interfaces

Kung-Yen Lee, Purdue University


Silicon carbide (SiC) has received increasing attention from the power semiconductor industry due to its material property advantages over silicon. SiC devices that perform beyond the theoretical limits of Si devices have been demonstrated many times. Important basic research topics that are relevant to SiC devices are the characteristics of SiC surfaces and interfaces. The structural and electrical nature of surfaces and interfaces plays a significant role in the performance of SiC Schottky diodes and metal-oxide-semiconductor field-effect transistors (MOSFETs). Therefore, aspects of surfaces and interfaces relevant to SiC diodes and MOSFETs are investigated at Purdue. Topics of interest include (1) the investigation of how surface morphological defects influence SBD device characteristics, (2) understanding how SiC surface morphology may be maintained during high-temperature implantation annealing, (3) high-quality and low-doped 4H-SiC C-face epitaxial layers grown by hot-wall horizontal chemical vapor deposition, and (4) examination of the characteristics at the SiC/oxide interface over non-implanted and implanted regions of the C-face 4H-SiC. The results obtained show the following. In SBDs, premature breakdown caused by micropipes and comets are below 100V, and 250V for a current density of 1 mA/square cm on devices with ideal parallel plane breakdown at 1760V. Carrots and wavy pits do not influence reverse breakdown voltage (>1000V), but carrots have higher leakage current at the lower reverse bias. Densities of micropipes, comets, carrots, and wavy pits are 16, 38, 19 and 402 per square cm, respectively. These densities are too high to obtain a high yield of large area power devices and cannot be reduced after the high-temperature post-implant anneal. The silane annealing and the graphite cap annealing in the Ar ambient were used to prevent surface degradation during the annealing. The RMS roughness obtained from AFM for the silane anneal and the graphite cap anneal is 2.4nm and 0.5nm, respectively. Al implantation with a dose of 8E12 per square cm was performed at 650°C and annealed at 1600°C from 5min to 60min. The oxide breakdown fields for undoped and nitrogen doped regions on the C-face 4H-SiC are 8MV/cm. However, it is only 3MV/cm for the Al doped region. The lowest doping concentration of a 4H-SiC C-face epitaxial layer in the world achieved at Purdue is 6E14 per cubic cm and densities of hillocks and carrots are 0.2 and 0.8 per square cm at a C/Si ratio of 4, respectively. The lowest interface trap density of the C-face SiO2/SiC interface is about 6E11 per eV square cm at 0.24eV below the conduction band. The best RMS roughness of a C-face epitaxial layer is 0.2nm at C/Si ratios of 3 and 4.




Capano, Purdue University.

Subject Area

Electrical engineering

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