Algorithms for model reduction of large scale RLC systems
Mathematical models of VLSI RLC interconnects typically involve a large number of variables. Direct simulation or analysis of such models is impractical; model reduction, i.e., the derivation of an approximate model that has far fewer variables, is a standard technique that addresses this issue. ^ While model reduction is a well-studied topic, the large sizes of VLSI interconnect models present challenges. In this thesis, we explore a number of model reduction strategies, and their adaptation for reduced-order VLSI interconnect modeling. We first present a framework in which different model reduction techniques can be interpreted in a unified manner, with an underlying abstract notion of “energy”. The specific techniques we consider are balanced truncation, stochastic balanced truncation and bounded-real balanced truncation. We also consider a hybrid technique that combines aspects of balanced truncation and stochastic balanced truncation, and interpret it as a balanced truncation of a generalized factor of the original transfer function. We then consider the numerical implementation of the hybrid technique, whose exact implementation requires the solution of one Lyapunov equation and one Riccati equation. Thus, a direct numerical implementation of this technique is prohibitively expensive. However, the notion of energy underlying the hybrid technique suggests natural, approximate, implementations; we describe these, showing how we can systematically trade off computation and approximation accuracy. We demonstrate with numerical examples that the approximate implementations perform very well in practice. ^
Major Professors: Venkataramanan Balakrishnan, Purdue University, Cheng-Kok Koh, Purdue University.
Engineering, Electronics and Electrical
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