Lateral power MOSFETs in silicon carbide
Abstract
Because of its large bandgap, its high critical electric field, and its high quality native SiO2, silicon carbide is considered to be the material of choice for power switching electronics in the future. Until 1997 the maximum thickness of commercially available epilayers serving as the drift region for power devices has been limited to 10–15 μm, limiting the maximum blocking voltage to 1500 V for vertical power devices in silicon carbide. In this study, we present the first lateral power devices on a semi-insulating vanadium doped substrate of silicon carbide. The first generation of lateral DMOSFETs in 4H-SiC yielded a blocking voltage of 2.6 kV—more than twice what was previously reported for any SiC MOSFETs—but suffered from low MOS channel mobility caused by the high anneal temperatures (≥1600°C) required to activate the p-type ion-implant. Combining the high blocking-voltage of the vanadium-doped substrate with the higher MOS mobility previously achieved by an epitaxially-grown accumulation channel leads us to the LACCUFET device: No p-type implant is necessary. This device shows a blocking voltage of 2.7 kV unmatched by any SiC transistor until February 2000 combined with a much lower specific on-resistance of 3.6 Ω•cm2. The ability to combine long-channel test MOSFETs with high channel mobility of 27 cm2/(volt·sec) in 4H-SiC with power devices of 13 cm2/(volt·sec) on the same chip has been demonstrated. The Figure of Merit Vblock 2/Ron,sp for this new NON-RESURF LDMOSFET in 4H-SiC is close to the theoretical limit for vertical power devices made of silicon. The specific on-resistance can be reduced by factor 2.5 by forward-biasing the p-base to source junction by 2 to 3 volts. Basic operation in Static Induction Injection Accumulation FET (SIAFET) mode has been demonstrated. Lateral (Non-Punch-Through) Insulated Gate Bipolar Transistors (LIGBT) have been presented for the first time showing similar on-resistance and blocking voltages but significantly higher on-currents for both 4H and 6H-SiC devices compared to their MOSFET counterparts. Test p-i-n diodes show lower on-resistance by carrier injection into the drift region.
Degree
Ph.D.
Advisors
Melloch, Purdue University.
Subject Area
Electrical engineering|Materials science
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