High Efficiency Edge Coupler, Novel Nonlinear Optical Polymers with Large Kerr-Coefficient and Automatic Layout Generation in Silicon Photonics

Ben Niu, Purdue University


The potential of on-chip photonics is limited by the difficulty in coupling light from optical fibers to on-chip waveguides. Specifically, 3rd-order nonlinear on-chip photonics usually requires high optical power. Hence the first major focus of this research is to design high-efficiency edge couplers. To achieve this goal, loss mechanisms of basic inverse taper couplers are analyzed and experimentally verified. Then a cantilever-encapsulated inverse taper is demonstrated to further lower coupling loss compared to basic inverse tapers. Nonetheless, both couplers are designed to couple with lensed fibers. Hence for flat fibers with larger mode-field-diameter (MFD), a novel sub-wavelength grating based edge coupler is proposed and experimentally demonstrated to have 1.9dB/facet loss. Eventually a silicon multi-section taper with intermediate SU-8 waveguide cladding is proposed for flat fibers with even larger MFD and experimentally verified. Based on the result several suggestions are proposed for further improvement. Since high optical power is necessary for 3rd-order nonlinear applications, silicon is not the material choice due to its intrinsic two-photon-absorption(TPA). Thus the second focus of this research is to explore a novel nonlinear optical polymer termed PolyDDMEBT. Both its linear and nonlinear optical properties are characterized. The measurement shows that the material has a real part refractive index of 1.68 and negligible absorption in 1550nm. Also, the polymer possesses negative thermo-optical coefficient. In addition, Z-scan measurement shows large Kerr-coefficient and no presence of TPA in this polymer. As a result, PolyDDMEBT may be useful for 3rd-order optical nonlinear applications. The third focus of this research is regarding automatic layout generation of on-chip photonics. This tool developed by the author is proven capable of generating both simple and complex on-chip photonic layouts. And it is especially efficient in large numbers of parameter sweepings.




Qi, Purdue University.

Subject Area

Electrical engineering

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