Keywords

nanostructures, intracellular sensing, photolithography, metal-assisted chemical etching

Presentation Type

Poster

Research Abstract

Currently available nanotechnologies are capable of creating various nanostructures in controlled dimensions such as particles (0D), wires (1D), membranes (2D), and cubes (3D) by exploiting “top-down” or “bottom-up” methods. However, there exist limitations to systematically construct hierarchical nanostructures with geometric complexities. This study is focused on developing a novel nanofabrication strategy that can rationally produce a set of hierarchical nanostructures configured with precisely engineered facets, tip shapes, and tectonic motifs. We aim to identify a collection of optimal materials, array layouts, basic components, and nanofabrication techniques for the production of hierarchical nanostructures by exploiting device-grade semiconducting silicon materials. To accomplish this, device-grade silicon was processed by traditional photolithographic methods to create precisely engineered three-dimensional shapes. The three-dimensional structures were then layered with random patterns by exploiting metal-assisted chemical etching, leading to significantly increased surface areas with arbitrary morphological complexity.

Session Track

Nanotechnology

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Aug 4th, 12:00 AM

Development of Micro-/Nano-Architectures for Intracellular Sensing Platform

Currently available nanotechnologies are capable of creating various nanostructures in controlled dimensions such as particles (0D), wires (1D), membranes (2D), and cubes (3D) by exploiting “top-down” or “bottom-up” methods. However, there exist limitations to systematically construct hierarchical nanostructures with geometric complexities. This study is focused on developing a novel nanofabrication strategy that can rationally produce a set of hierarchical nanostructures configured with precisely engineered facets, tip shapes, and tectonic motifs. We aim to identify a collection of optimal materials, array layouts, basic components, and nanofabrication techniques for the production of hierarchical nanostructures by exploiting device-grade semiconducting silicon materials. To accomplish this, device-grade silicon was processed by traditional photolithographic methods to create precisely engineered three-dimensional shapes. The three-dimensional structures were then layered with random patterns by exploiting metal-assisted chemical etching, leading to significantly increased surface areas with arbitrary morphological complexity.