Capacitance-Voltage Characterization of GaAs-Oxide Interfaces

G Brammertz, IMEC VZW, B-3001 Louvain, Belgium
H C. Lin, Purdue University - Main Campus
K Martens, IMEC VZW, B-3001 Louvain, Belgium
D Mercier, IMEC VZW, B-3001 Louvain, Belgium
C Merckling, IMEC VZW, B-3001 Louvain, Belgium
J Penaud, Riber, F-95870 Bezons, France
C Adelmann, IMEC VZW, B-3001 Louvain, Belgium
S Sioncke, IMEC VZW, B-3001 Louvain, Belgium
W E. Wang, IMEC, B-3001 Louvain, Belgium
M Caymax, IMEC VZW, B-3001 Louvain, Belgium
M Meuris, IMEC VZW, B-3001 Louvain, Belgium
M Heyns, Katholieke Univ Leuven

Date of this Version

10-7-2008

This document has been peer-reviewed.

 

Abstract

We will shortly review the basic physics of charge-carrier trapping and emission from trapping states within the bandgap of a semiconductor in order to show that high-temperature capacitance-voltage (C-V) measurements are necessary for GaAs metal-oxide-semiconductor characterization. The midgap trapping states in GaAs have characteristic emission times on the order of 1000 s, which makes them extremely complicated to measure at room temperature. Higher substrate temperatures speed up these emission times, which makes measurements of the midgap traps possible with standard C-V measurements. C-V characterizations of GaAs/Al2O3, GaAs/Gd2O3, GaAs/HfO2, and In0.15Ga0.85As/Al2O3 interfaces show the existence of four interface state peaks, independent of the gate oxide deposited: a hole trap peak close to the valence band, a hole trap peak close to midgap energies, an electron trap peak close to midgap energies, and an electron trap peak close to the conduction band.

Discipline(s)

Nanoscience and Nanotechnology

 

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