Substrate engineering for high-performance surface-channel III-V metal-oxide-semiconductor field-effect transistors
Date of this Version
December 2007Citation
APPLIED PHYSICS LETTERS 91, 232107 2007
This document has been peer-reviewed.
Abstract
High-performance inversion-type enhancement-mode n-channel In0.65Ga0.35As metal-oxide-semiconductor field-effect transistors (MOSFETs) with atomic-layer-deposited Al2O3 as gate dielectric are demonstrated. A 0.5 mu m gate-length MOSFET with an Al2O3 gate oxide thickness of 10 nm shows a gate leakage current less than 5x10(-6) A/cm(2) at 4 V gate bias, a threshold voltage of 0.40 V, a maximum drain current of 670 mA/mm, and transconductance of 230 mS/mm at drain voltage of 2 V. More importantly, a model is proposed to ascribe this 80% improvement of device performance from In0.53Ga0.47As MOSFETs mainly to lowering the energy level difference between the charge neutrality level and conduction band minimum for In0.65Ga0.35As. The right substrate or channel engineering is the main reason for the high performance of the devices besides the high-quality oxide-semiconductor interface.