Top-gated graphene field-effect-transistors formed by decomposition of SiC
Date of this VersionMarch 2008
APPLIED PHYSICS LETTERS 92, 092102
This document has been peer-reviewed.
Top-gated, few-layer graphene field-effect transistors (FETs) fabricated on thermally decomposed semi-insulating 4H-SiC substrates are demonstrated. Physical vapor deposited SiO2 is used as the gate dielectric. A two-dimensional hexagonal arrangement of carbon atoms with the correct lattice vectors, observed by high-resolution scanning tunneling microscopy, confirms the formation of multiple graphene layers on top of the SiC substrates. The observation of n-type and p-type transition further verifies Dirac Fermions' unique transport properties in graphene layers. The measured electron and hole mobilities on these fabricated graphene FETs are as high as 5400 and 4400 cm(2)/V s, respectively, which are much larger than the corresponding values from conventional SiC or silicon.