High performance In2O3 nanowire transistors using organic gate nanodielectrics

Sanghyun Ju, Department of Physics, Kyonggi University
Fumiaki Ishikawa, Department of Electrical Engineering, University of Southern California
Pochiang Chen, Department of Electrical Engineering, University of Southern California
Hsiao-Kang Chang, Department of Electrical Engineering, University of Southern California
Chongwu Zhou, Department of Electrical Engineering, University of Southern California
Young-geun Ha, Department of Chemistry and the Materials Research Center, and the Institute for Nanoelectronics and Computing, Northwestern University
Jun Liu, Department of Chemistry and the Materials Research Center, and the Institute for Nanoelectronics and Computing, Northwestern University
Antonio Facchetti, Northwestern University
Tobin J. Marks, Northwestern University
David B. Janes, Purdue University

Date of this Version

June 2008

Citation

APPLIED PHYSICS LETTERS 92, 222105

This document has been peer-reviewed.

 

Abstract

We report the fabrication of high performance nanowire transistors (NWTs) using In2O3 nanowires as the active channel and a self-assembled nanodielectric (SAND) as the gate insulator. The SAND-based single In2O3 NWTs are controlled by individually addressed gate electrodes. These devices exhibit n-type transistor characteristics with an on-current of similar to 25 mu A for a single In2O3 nanowire at 2.0V(ds), 2.1V(gs), a subthreshold slope of 0.2 V/decade, an on-off current ratio of 10(6), and a field-effect mobility of similar to 1450 cm(2)/V s. These results demonstrate that SAND-based In2O3 NWTs are promising candidates for high performance nanoscale logic technologies.

 

Share